Modern electronics, such as smart phones, personal digital assistants, location based services devices, servers, and storage arrays, are packing more integrated circuits into an ever-shrinking physical space with expectations for decreasing cost. Numerous technologies have been developed to meet these requirements. Some of the research and development strategies focus on new package technologies while others focus on improving the existing package technologies. Research and development in the existing package technologies may take a myriad of different directions.
Integrated circuit (IC) chips or die are typically assembled into an integrated circuit package that is soldered to a printed circuit board (PCB). A chip or die may have contacts on one surface (e.g., such as a field or array of contacts) that are electrically connected to a first set of contacts on one surface of an electronic device package (e.g., such as a chip or die package), and there may be another set of contacts on the package for connection to a PCB, such as a mother board. Thus, a circuit device, such as a chip or a die can be assembled into a package on a substrate, strip, or wafer having multiple packages. Once the packages are assembled, each package may be separated from the other packages and subsequently attached to a PCB. Electronic access to and operation of circuit devices, such as circuit devices on a semiconductor (e.g., silicon) substrate, may be provided by one set of solder balls and/or contact wires between the circuit device and a circuit device package, and a second set of solder balls between the package and contacts of another electronic device (e.g., such as a PCB).
During manufacture and assembly, such a package may experience thermal variation and vertical tensile strain. In addition, the package may include materials having various coefficients of thermal expansion (CTE). For example, multiple packages may be formed or mounted on a substrate, strip, or wafer by mounting a circuit device at each of the package locations, filling the space between the circuit device and the location with an underfill material, and then coating the circuit device and location with a mold material. Subsequently, each package location including the circuit device mounted therein, may be singulated, or separated from the other packages and to form a single package for attaching to a PCB or motherboard.
Therefore, there may be CTE mismatches between a substrate on which packages are manufactured (e.g., such as a substrate on which multiple circuit devices are assembled to multiple package locations, underfilled, and molded), the circuit devices themselves, the material of the underfill layer (e.g., filling the gap between the circuit devices and the substrate), and the mold material (e.g., such as material to seal out moisture, formed over the circuit devices, package locations, and fill material).
Furthermore, voids or irregularities may exist in the underfill layer. Thus, a substrate having a number of packages formed thereon at package locations may experience warping or bowing depending on the degree of CTE mismatches between the materials mentioned above, the thicknesses of the materials, the number of packages formed on the substrate, the space between the packages, the quality of the underfill layer and the number and intensity of thermal variations experienced during manufacture of the packages and assembly of the circuit devices to the packages. This warping may cause delamination or bowing of layers of the package and of the circuit devices assembled into the packages.
Dispenser needle location and movement are the important factors for avoiding voids and/or gaps in the underfill layer while also preventing epoxy overflow to the top of the circuit device die during processing. Additional underfill processing complications may be introduced when two or more adjacent circuit device dies are mounted on the same substrate. For example, additional care must be taken when dispensing underfill material to avoid underflow volume imbalance. Furthermore, slow underfilling speed may occur due to die size, bump pitch, and/or bump height differences.
Thus, a need still remains for improved packages. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures, adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.